International Journal of Computer Science & Engineering Technology

ISSN : 2229-3345

Open Access
Open Access

ABSTRACT

Title : An Efficient Baugh-Wooley Architecture for Both Signed & Unsigned Multiplication
Authors : Pramodini Mohanty, Rashmi Ranjan
Keywords : Baugh-Wooley Multiplier, Pipeline resister, PowerEfficient, Carry Save Adder.
Issue Date : April 2012
Abstract :
This project presents an efficient implementation of a high speed multiplier using the shift and adds method of Baugh-Wooley Multiplier. This parallel multiplier useslesser adders and lesser iterative steps. As a result of which they occupy lesser space as compared to the serial multiplier. This is very important criteria because in the fabrication of chips and high performance system requires components which are as small as possible. Experimental result demonstrate that the proposed circuit not only improves the accurate performance but also reduces the hardware complexity and also less power consumption that is dynamic power of 15.3mW and maximum clock period of 3.912ns is required which is very efficient as compared to the reference paper.
Page(s) : 94-99
ISSN : 2229-3345
Source : Vol. 3, Issue.04

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